Telum II processor to power IBM Z mainframe systems – What’s new
IBM Thursday showcased Telum II processor which will power the tech giant’s upcoming IBM Z mainframe systems
Palo Alto (California): IBM Thursday showcased Telum II processor which will power the tech giant’s upcoming IBM Z mainframe systems.
Along with unveiling the features of Telum II processors, IBM also shared the details of IBM Spyre Accelerator
Detailing the architecture highlights of Telum II processor and Spyre Accelerator at Hot Chips 2024, IBM said the two technologies will be available to IBM Z mainframe system and LinuxONE clients in 2025.
“The Telum II processor will be the central processor powering IBM's next-generation IBM Z and IBM LinuxONE platforms. It is expected to be available to IBM Z and LinuxONE clients in 2025.
“The IBM Spyre Accelerator, currently in tech preview, is also expected to be available in 2025”, IBM announced at the tech event.
The IBM further said that the new processor innovations are set to accelerate AI on Next-Generation IBM Z mainframe systems.
"The new technologies are designed to significantly scale processing capacity across next generation IBM Z mainframe systems helping accelerate the use of traditional AI models and Large Language AI models in tandem through a new ensemble method of AI", IBM said.
IBM Telum II Processor Features
Designed to power next-generation IBM Z systems, the new IBM chip features increased frequency, memory capacity, 40% growth in cache and integrated AI accelerator core.
Telum II processor also comes with a coherently attached Data Processing Unit (DPU), a key updgradation from the first generation Telum chip.
The new processor is expected to support enterprise compute solutions for LLMs, servicing the industry's complex transaction needs.
The IO acceleration unit is a completely new Data Processing Unit (DPU) on the Telum II processor chip. This is engineered to accelerate complex IO protocols for networking and storage on the mainframe.
"The DPU simplifies system operations and can improve key component performance", IBM said.
IBM Spyre Accelerator Features
IBM Spyre Accelerator provides additional AI compute capability to complement the Telum II processor.
Working together, the Telum II and Spyre chips form a scalable architecture to support ensemble methods of AI modeling – the practice of combining multiple machine learning or deep learning AI models with encoder LLMs.
"By leveraging the strengths of each model architecture, ensemble AI may provide more accurate and robust results compared to individual models", IBMsaid.
The IBM Spyre Accelerator chip, previewed at the Hot Chips 2024 conference, will be delivered as an add-on option. Each accelerator chip is attached via a 75-watt PCIe adapter and is based on technology developed in collaboration with the IBM Research. As with other PCIe cards, the Spyre Accelerator is scalable to fit client needs.
"Our robust, multi-generation roadmap positions us to remain ahead of the curve on technology trends, including escalating demands of AI," said Tina Tarquinio, VP, Product Management, IBM Z and LinuxONE.
"The Telum II Processor and Spyre Accelerator are designed to deliver high-performance, secured, and more power efficient enterprise computing solutions. After years in development, these innovations will be introduced in our next generation IBM Z platform so clients can leverage LLMs and generative AI at scale", she added.
The Telum II processor and the IBM Spyre Accelerator will be manufactured by Samsung Foundry - IBM's long-standing fabrication partner, and built on its high performance, power efficient 5nm process node.
"Working in concert, they will support a range of advanced AI-driven use cases designed to unlock business value and create new competitive advantages. With ensemble methods of AI, clients can achieve faster, more accurate results on their predictions. The combined processing power announced today will provide an on ramp for the application of generative AI use cases", IBM said.
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